Sr. Topics Teaching Hours Module Weightage
Number System
1.1Decimal number, binary number, octal and Hexadecimal number
1.2 Weighted and un-weighted codes BCD, Gray, Excess-3, ASCII, EBCDIC
1.3 Conversion: Binary, Octal, Decimal and Hexadecimal number systems
1.4Binary addition, subtraction, multiplication, division
1.5 Complements: 1’s, 2’s, 9’s and 10’s and its use for subtraction
Logic Gates and Boolean Algebra
2.1 Symbol, operation and truth-table: AND, OR, NOT, NAND, NOR, EX-OR, EX-NOR
2.2 Positive and negative logic system
2.3 Laws and theorems of Boolean algebra
2.4 Boolean expressions :Sum of product and product of sum, Karnaugh maps and its use for simplification up to four variable Boolean expressions, Don't care condition
2.5 The universal building blocks-NAND & NOR, AND-OR network, NAND-NAND networks for implementation of Boolean expressions
Combinational Logic Circuits
3.1 Half adder, full adder, parallel binary adder, 8421 adder, half subtractor , full subtractor, parallel binary subtractor,1's complement subtractor circuit, 2's complement subtractor/adder circuits
3.2 Encoder, Decoder (2 to 4 line, 3 to 8 line,4 to 16 line), Binary to gray and gray to binary code converters and Comparator, Multiplexers: 2 to1, 4 to1, 8 to1, 16 to1, De-Multiplexers: 1to 2,1to 4,1to 8,1to 16, Parity Generators , parity checkers and their applications
Sequential Logic Circuits
4.1 S-R flip-flops(FF), edge triggered S-R FF, D FF and edge triggered D FF, JK FF: Edge trigger JK FF, JK master slave FF, Edge Trigger T FF
Logic Families
5.1 Classifications of logic families: Saturated and non-saturated logic, RTL, DTL, TTL, MOS & CMOS families. Inverter, Two input NAND & NOR gate
5.2 Two input AND, OR, NAND and NOR gate circuit using DTL logic family, Two input NAND gate circuit using TTL families, Characteristics of TTL family, Three state TTL gates, MOS based NOT gate, Two input NAND & NOR gate, CMOS based NOT gate, Two input NAND & NOR gate